| Manufacturer | Part # | Datasheet | Description |
Cypress Semiconductor
|
CY24713 |
149Kb/6P |
Set-top Box Clock Generator with VCXO |
| CY54FCT138T |
155Kb/6P |
1-of-8 Decoder |
| MB3793-27A |
610Kb/30P |
Precise detection of power voltage fall: 2.5% |
| MB3793-34A |
949Kb/26P |
Precise detection of power voltage fall: ?깍?2.5% |
| MB95F856K |
5Mb/172P |
The MB95850K/860K/870K Series is a series of general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the microcontrollers of these series contain a variety of peripheral functions. |
| CY2DP314 |
213Kb/9P |
1 of 2:4 Differential Clock/Data Fanout Buffer |
| CY2DP3110 |
279Kb/9P |
1 of 2:10 Differential Clock/Data Fanout Buffer |
| CY7C1305AV25 |
333Kb/21P |
18-Mbit Burst of 4 Pipelined SRAM with QDR Architecture |
| CY7C1302DV25 |
231Kb/18P |
9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture |
| CY7C1303BV18 |
246Kb/19P |
18-Mbit Burst of 2 Pipelined SRAM with QDR??Architecture |
| CY7C1303BV25 |
412Kb/25P |
18-Mbit Burst of Two-Pipelined SRAM with QDR짰 Architecture |
| CY7C1302CV25 |
296Kb/18P |
9-Mbit Burst of Two Pipelined SRAMs with QDR??Architecture |
| CY7C1305BV25 |
918Kb/21P |
18-Mbit Burst of 4 Pipelined SRAM with QDR??Architecture |
| CY7C1302DV25 |
386Kb/18P |
9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture |
| CY7C1303AV18 |
479Kb/20P |
18-Mb Burst of 2 Pipelined SRAM with QDR??Architecture |
| CY7C1303BV25 |
817Kb/19P |
18-Mbit Burst of 2 Pipelined SRAM with QDR??Architecture |
| CY7C1305BV18 |
244Kb/20P |
18-Mbit Burst of 4 Pipelined SRAM with QDR??Architecture |
| CY7C1304DV25 |
424Kb/18P |
9-Mbit Burst of 4 Pipelined SRAM with QDR??Architecture |
| CY7C1304CV25 |
300Kb/18P |
9-Mbit Burst of 4 Pipelined SRAM with QDR??Architecture |
| CY7C1303CV25 |
539Kb/21P |
18-Mbit Burst of 2 Pipelined SRAM with QDR Architecture |
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